Apple IIe

The long-lived II with MMU and IOU custom chips and an aux slot.

Chips

Chip	Where	Role
6502 / 65C02 CPU	UC4 (Apple schematic 050-0051-D)	CPU
MMU 344-0010	UE4 (Apple schematic 050-0051-D; Sams CC10 agrees)	Memory Management Unit
IOU 344-0020	UE5 (Apple schematic 050-0051-D sheet 3; Sams CC10 agrees)	Input/Output Unit
AY-5-3600 Keyboard Encoder	Main board; the keyboard reaches it over a 26-pin ribbon	Keyboard encoder
4164 DRAM 64K×1	RAM row	Main RAM (8 chips = 64 KB)
4464 / 41464 DRAM 64K x 4	Two 64K x 4 RAMs on the enhanced CF ROM board (silk 64KX4 RAM, row F, columns 8 and 9); designators not read	Dynamic RAM, 64K x 4. Main RAM on the BBC Master; reported on later 130XE boards.
IIe CF ROM 342-0349 (16 KB, 28 pins)	Silk CF ROM on the late enhanced board (64K x 4 RAMs); designator not read	Enhanced IIe firmware in one 16 KB ROM, in place of the CD and EF ROMs (late enhanced board)
2732-pinout 4K x 8 ROM	UF4, video ROM: 342-0133 (unenhanced) or 342-0265 (enhanced). Apple schematic 050-0051-D sheet 3 draws a 2732.	Character ROM in the 2732 pinout: IIe and IIc video ROM (4K x 8); PCjr character ROM (2K x 8 fitted, socket wired for a 2716 or 2732)
2716-pinout 2K x 8 ROM	UE12, keyboard ROM 342-0132	Keyboard ROM of the IIe and IIc, in a socket drawn for a 2716 EPROM
IIe timing HAL 342-0170 (HAL/PAL 16R8)	UD1 (Apple schematic 050-0051-D sheet 3; the Sams IIe folder uses the same designator)	Divides the 14M master clock into PHI0, PHI1, Q3, the RAM strobes and the video load and dot-clock signals

Rail	Expect	Measure at
+5 V	4.85-5.15 V UNVERIFIED	2e-psu pin 3 (PSU connector); MMU pin 25; IOU pin 28; CPU pin 8; 2e-slot pin 25
+12 V	11.1-12.5 V	2e-psu pin 4 (PSU connector); 2e-slot pin 50
-5 V	-4.7 to -5.7 V	2e-psu pin 6 (PSU connector); 2e-slot pin 34
-12 V	-10.8 to -13.2 V	2e-psu pin 5 (PSU connector); 2e-slot pin 33; AY-5-3600 pin 27 (keyboard encoder; the late CF ROM board photo shows a KR9600-PRO)