MC146818A real-time clock with RAM pinout
DIP-24. Clock, calendar, alarm and 50 bytes of battery-backed RAM.
A multiplexed-bus clock: the CPU puts an address on AD0-AD7, strobes AS, then reads or writes the data. It keeps time on a 32.768 kHz crystal and has no battery pin, so it keeps time only while VDD stays up. /STBY blocks bus access while the main supply is down. A dead RTC gives a wrong or stopped clock and failed boot checks. HERO Jr (U213): decoded at $D810-$D81F; MOT tied high; VDD comes from U209 (Vca), which stays on in sleep while SW1 is ON, so turning POWER off loses the time; the RESET key drives /RESET; /IRQ feeds the sleep wake path (not the CPU) and pulses it every 5 s; the ROM sets SQW to 256 Hz. BBC Master (IC11): not memory-mapped; the system VIA and its addressable latch drive the clock enable, R/W, address strobe and data (Master Series Service Manual pp. 21, 23), with a 3 V lithium cell for backup.
Open the interactive RTC pinoutPins
| Pin | Name | Type | Signal |
|---|---|---|---|
| 1 | MOT | ctrl | Bus timing select: high = Motorola-style timing (AS, DS), low = Intel-style. |
| 2 | OSC1 | clock | Crystal pin 1. |
| 3 | OSC2 | clock | Crystal pin 2. |
| 4 | AD0 | data | Multiplexed address/data bit 0. |
| 5 | AD1 | data | Multiplexed address/data bit 1. |
| 6 | AD2 | data | Multiplexed address/data bit 2. |
| 7 | AD3 | data | Multiplexed address/data bit 3. |
| 8 | AD4 | data | Multiplexed address/data bit 4. |
| 9 | AD5 | data | Multiplexed address/data bit 5. |
| 10 | AD6 | data | Multiplexed address/data bit 6. |
| 11 | AD7 | data | Multiplexed address/data bit 7. |
| 12 | VSS | ground | Ground. |
| 13 | /CS | ctrl | Chip select, active low. |
| 14 | AS | ctrl | Address strobe: latches the address on the falling edge. |
| 15 | R/W | ctrl | Read/write from the CPU. |
| 16 | /STBY | ctrl | Standby, active low: blocks AS, DS, R/W and AD0-AD7 so the bus cannot corrupt the clock while the main supply is off. Not a battery input. |
| 17 | DS | ctrl | Data strobe (E clock in Motorola mode). |
| 18 | /RESET | ctrl | Reset: clears the interrupt enables but not time or RAM. |
| 19 | /IRQ | ctrl | Interrupt request, open drain. |
| 20 | CKFS | ctrl | Clock output frequency select. |
| 21 | CKOUT | clock | Clock output (divided time base). |
| 22 | PS | ctrl | Power sense input: held low at power-up it clears the VRT (valid RAM and time) bit. |
| 23 | SQW | ctrl | Square-wave output. Rate set by register A. |
| 24 | VDD | power | +5 V supply. |
Fitted in
- HERO Jr U213
- BBC Master 128 IC11