PLA 82S100 pinout

DIP-28. Address decode + bank switching

MOS 906114-01 on the C64, 251641-02 (7700) on the C16 and Plus/4. A Signetics 82S100 field-programmed logic array: 16 inputs decoded to 8 outputs F0-F7. On the C64 it makes /BASIC, /KERNAL, /CHAROM, /I/O, /ROML, /ROMH, GR/W and CASRAM from the address, bank and VIC lines. The number one C64 failure, and it runs hot. Socket it.

Open the interactive PLA pinout

Pins

Pin	Name	Type	Signal
1	FE	ctrl	Fuse-programming enable on the 82S100. Tied off in normal use. UNVERIFIED
2	I7	ctrl	Input I7. C64: CPU A13.
3	I6	ctrl	Input I6. C64: CPU A14.
4	I5	ctrl	Input I5. C64: CPU A15.
5	I4	ctrl	Input I4. C64: VA14 (VIC bank, from CIA2). UNVERIFIED
6	I3	ctrl	Input I3. C64: CHAREN (6510 port bit 2). UNVERIFIED
7	I2	ctrl	Input I2. C64: HIRAM (6510 port bit 1).
8	I1	ctrl	Input I1. C64: LORAM (6510 port bit 0).
9	I0	ctrl	Input I0. C64: /CAS from the VIC-II. UNVERIFIED
10	F7	ctrl	Output F7. C64: /ROMH (cartridge high ROM select), active LOW.
11	F6	ctrl	Output F6. C64: /ROML (cartridge low ROM select), active LOW.
12	F5	ctrl	Output F5. C64: /I/O (selects the $D000-$DFFF I/O block), active LOW.
13	F4	ctrl	Output F4. C64: GR/W (color RAM write).
14	GND	ground	0 V.
15	F3	ctrl	Output F3. C64: /CHAROM (character ROM select), active LOW.
16	F2	ctrl	Output F2. C64: /KERNAL (KERNAL ROM select), active LOW.
17	F1	ctrl	Output F1. C64: /BASIC (BASIC ROM select), active LOW.
18	F0	ctrl	Output F0. C64: CASRAM (gates /CAS to the DRAM).
19	/CE	ctrl	Chip enable (/OE in the C64 equations). LOW lets the PLA drive its outputs.
20	I15	ctrl	Input I15. C64: VA12 (VIC address).
21	I14	ctrl	Input I14. C64: VA13 (VIC address).
22	I13	ctrl	Input I13. C64: /GAME from the expansion port.
23	I12	ctrl	Input I12. C64: /EXROM from the expansion port.
24	I11	ctrl	Input I11. C64: R/W.
25	I10	ctrl	Input I10. C64: AEC from the VIC-II. UNVERIFIED
26	I9	ctrl	Input I9. C64: BA from the VIC-II. UNVERIFIED
27	I8	ctrl	Input I8. C64: CPU A12.
28	Vcc	power	+5 V supply.

PLA 82S100 pinout

Pins

Fitted in

Sources