74LS259 8-bit addressable latch (9334) pinout
DIP-16. Controller soft switches $C080-$C08F,X: phases, motor, drive select, Q6, Q7
Any access to $C080+slot×$10 to $C08F+slot×$10 sets or clears one of eight latches: A1-A3 pick the latch, A0 is the new value (even address off, odd on). Q0-Q3 are the stepper phases, Q4 motor, Q5 drive 1/2, Q6 and Q7 the sequencer mode. /RESET clears them all, so Control-Reset stops the drive. Schematic rev 01 changed the part from 74LS259 to the pin-compatible 9334.
Open the interactive 74LS259 pinoutPins
| Pin | Name | Type | Signal |
|---|---|---|---|
| 1 | S0 | addr | Latch select 0: address A1 (slot pin 3). |
| 2 | S1 | addr | Latch select 1: address A2 (slot pin 4). |
| 3 | S2 | addr | Latch select 2: address A3 (slot pin 5). |
| 4 | Q0 | io | Phase 0 ($C080/$C081,X) to ribbon pin 2. |
| 5 | Q1 | io | Phase 1 ($C082/$C083,X) to ribbon pin 4. |
| 6 | Q2 | io | Phase 2 ($C084/$C085,X) to ribbon pin 6. |
| 7 | Q3 | io | Phase 3 ($C086/$C087,X) to ribbon pin 8. |
| 8 | GND | ground | 0 V. |
| 9 | Q4 | ctrl | Motor on ($C088 off / $C089 on, X) through a 74LS05 to the 556 one-second turn-off timer. |
| 10 | Q5 | ctrl | Drive select ($C08A drive 1 / $C08B drive 2, X) to the enable gates. |
| 11 | Q6 | ctrl | Q6 ($C08C / $C08D,X) to P6 address A2: read data vs load or sense write protect. |
| 12 | Q7 | ctrl | Q7 ($C08E read / $C08F write, X) to P6 address A3. |
| 13 | D | addr | Data in: address A0 (slot pin 2). Even address = 0, odd = 1. |
| 14 | /G | ctrl | Enable: /DEVICE SELECT (slot pin 41). |
| 15 | /CLR | ctrl | Clear: system /RESET (slot pin 31). Forces every switch off. |
| 16 | VCC | power | +5 V. |
Fitted in
- Disk II C2 on the Disk II Interface Card (9334, 74259 or 74LS259)
- DuoDisk 74LS259 on the 5.25 controller card
- UniDisk 5.25 74LS259 on the 5.25 controller card (II/IIe hosts only)