P6 state-sequencer PROM 341-0028 (256 × 8, 6309 type) pinout
DIP-20. Logic state sequencer program (the "state machine")
With the 74LS174 at A3 it forms the 2 MHz sequencer: the address is the current state, the Q6/Q7 soft switches, the read pulse and the data-register top bit; the outputs are the next state and a 4-bit command to the 74LS323 (clear, shift left, shift right, load). 341-0028 is the 16-sector part (341-0010 for 13-sector). It and the 74LS174 get +5 V through Q3 only while a drive is on. The dump is a full 256 × 8; a 74S287/82S129 (256 × 4, 16 pins) does not fit.
Open the interactive P6 pinoutPins
| Pin | Name | Type | Signal |
|---|---|---|---|
| 1 | A0 | addr | Address 0: 74LS174 Q5 (pin 15): sequencer state bit. |
| 2 | A1 | addr | Address 1: 74LS323 QA' (pin 8): top bit of the data register. |
| 3 | A2 | addr | Address 2: 74LS259 Q6 (pin 11): the Q6 soft switch. |
| 4 | A3 | addr | Address 3: 74LS259 Q7 (pin 12): the Q7 soft switch (read/write). |
| 5 | A4 | addr | Address 4: Synchronized read pulse (74LS174 Q3 through the 74LS132). |
| 6 | O1 (D0) | data | Sequencer command bit 0 to the 74LS323 (S0, S1, /CLR, SL). |
| 7 | O2 (D1) | data | Sequencer command bit 1 to the 74LS323 (S0, S1, /CLR, SL). |
| 8 | O3 (D2) | data | Sequencer command bit 2 to the 74LS323 (S0, S1, /CLR, SL). |
| 9 | O4 (D3) | data | Sequencer command bit 3 to the 74LS323 (S0, S1, /CLR, SL). |
| 10 | GND | ground | 0 V. |
| 11 | O5 (D4) | data | Next-state bit 0 to the 74LS174 latch. |
| 12 | O6 (D5) | data | Next-state bit 1 to the 74LS174 latch. |
| 13 | O7 (D6) | data | Next-state bit 2 to the 74LS174 latch. |
| 14 | O8 (D7) | data | Next-state bit 3 to the 74LS174 latch. |
| 15 | /E1 | ctrl | Output enable 1, active LOW. Tied to ground on the card. |
| 16 | /E2 | ctrl | Output enable 2, active LOW: from the drive-on logic, so the sequencer only drives while a drive is on. |
| 17 | A5 | addr | Address 5: 74LS174 Q2 (pin 7): state bit. |
| 18 | A6 | addr | Address 6: 74LS174 Q1 (pin 5): state bit. |
| 19 | A7 | addr | Address 7: 74LS174 Q0 (pin 2): state bit. |
| 20 | VCC | power | +5 V, switched: Q3 (MPSU51) powers P6 and the 74LS174 only while a drive is on. |
Fitted in
- Disk II B3 on the Disk II Interface Card, marked PROM P6
- DuoDisk PROM P6 on the 5.25 controller card
- UniDisk 5.25 PROM P6 on the 5.25 controller card (II/IIe hosts only)
Sources
- MMI 1980 Bipolar LSI Databook, 6308/6309 256 × 8 pin configuration, p. 3-5 (bitsavers)
- Apple schematic 050-0005-01, Disk II Interface Card (P6 at B3, Q3 power switch)
- Understanding the Apple II (Sather), Drive Off/On (sequencer power), p. 9-13
- A2DP: Disk II interface card ROM images (341-0028 dump is 256 × 8)