MC68B54 advanced data link controller (ADLC) pinout

DIP-28. Advanced data link controller: HDLC/SDLC framing, flag detection, CRC and FIFOs.

Fitted with the Econet upgrade. Transmit and receive clocks both come from the network clock receiver; carrier detect comes from a monostable that stays triggered while the clock is present; CTS drops on collisions or when no network is plugged in. Interrupts go to the CPU NMI, gated by INTON/INTOFF (reading &FE20/&FE18 on the Model B). On the BBC (Econet, &FEA0-&FEA3): /RTS (pin 2) enables the line driver; RxC and TxC (pins 4, 5) both take the network clock; RxD (3) comes from the data comparator and TxD (6) goes to the line driver (through a Schmitt inverter on the Model B); /IRQ (7) is routed to the CPU NMI; /DCD (27) comes from the clock-present monostable and /CTS (28) drops on collision or with no network.

Open the interactive ADLC pinout

Pins

Pin	Name	Type	Signal
1	VSS	ground	Ground.
2	/RTS	serial	Request to send.
3	RxD	serial	Receive data.
4	RxC	clock	Receive clock.
5	TxC	clock	Transmit clock.
6	TxD	serial	Transmit data.
7	/IRQ	ctrl	Interrupt request.
8	/RESET	ctrl	Reset.
9	/CS	ctrl	Chip select.
10	RS0	addr	Register select 0.
11	RS1	addr	Register select 1.
12	R/W	ctrl	Read/write.
13	E	clock	Enable (bus clock).
14	VCC	power	+5 V.
15	D7	data	Data bus bit 7.
16	D6	data	Data bus bit 6.
17	D5	data	Data bus bit 5.
18	D4	data	Data bus bit 4.
19	D3	data	Data bus bit 3.
20	D2	data	Data bus bit 2.
21	D1	data	Data bus bit 1.
22	D0	data	Data bus bit 0.
23	RDSR	ctrl	Receiver data service request.
24	TDSR	ctrl	Transmitter data service request.
25	FLAG DET	ctrl	Flag detected.
26	/LOC/DTR	ctrl	Loop on-line control / data terminal ready.
27	/DCD	serial	Data carrier detect.
28	/CTS	serial	Clear to send.

Fitted in

BBC Micro Model B IC89 (Econet upgrade)
BBC Master 128 Econet module (daughter board)

MC68B54 advanced data link controller (ADLC) pinout

Pins

Fitted in

Sources