MC6847 video display generator pinout

DIP-40. Text, semigraphics and color video from screen RAM. Used in the CoCo 1 and 2, the MC-10 and the Dragon 32 and 64.

The 6847 builds the picture from screen RAM and its character ROM, then sends color and sync to the RF modulator or the composite out. It runs warm. VDG faults are video-only: a dead VDG gives no picture, but the 6809 keeps running. The CoCo 3 has no separate VDG; the GIME does its job. CoCo 1 and 2, Dragon 32 and 64: /HS (pin 38) also feeds SAM pin 9 for DRAM refresh. MC-10: there is no SAM; the 6803 and discrete logic share the video RAM.

Open the interactive VDG pinout

Pins

Pin	Name	Type	Signal
1	Vss	ground	Ground.
2	DD6	data	Data bus bit 6 from screen RAM.
3	DD0	data	Data bit 0 from screen RAM.
4	DD1	data	Data bit 1 from screen RAM.
5	DD2	data	Data bit 2 from screen RAM.
6	DD3	data	Data bit 3 from screen RAM.
7	DD4	data	Data bit 4 from screen RAM.
8	DD5	data	Data bit 5 from screen RAM.
9	CHB	video	Chroma bias. Analog DC reference matching the quiescent level of ΦA and ΦB, for the MC1372.
10	ΦB	video	Chroma output ΦB. Four-level analog; with ΦA and Y picks one of eight colors. Also carries the burst reference.
11	ΦA	video	Chroma output ΦA. Three-level analog.
12	/MS	ctrl	Memory select (three-state control). LOW floats the VDG address lines so the CPU can reach the display RAM.
13	DA5	addr	Screen RAM address bit 5.
14	DA6	addr	Screen RAM address bit 6.
15	DA7	addr	Screen RAM address bit 7.
16	DA8	addr	Screen RAM address bit 8.
17	Vcc	power	+5 V supply.
18	DA9	addr	Screen RAM address bit 9.
19	DA10	addr	Screen RAM address bit 10.
20	DA11	addr	Screen RAM address bit 11.
21	DA12	addr	Screen RAM address bit 12.
22	DA0	addr	Screen RAM address bit 0.
23	DA1	addr	Screen RAM address bit 1.
24	DA2	addr	Screen RAM address bit 2.
25	DA3	addr	Screen RAM address bit 3.
26	DA4	addr	Screen RAM address bit 4.
27	GM2	ctrl	Graphics mode bit 2. Picks the graphics mode with GM0 and GM1.
28	Y	video	Luminance output. Six-level analog with composite sync and blanking.
29	GM1	ctrl	Graphics mode bit 1.
30	GM0	ctrl	Graphics mode bit 0.
31	/INT/EXT	ctrl	Internal or external character generator. LOW = internal ROM.
32	INV	ctrl	Inverse video. Flips the character colors.
33	CLK	clock	Clock input, nominally 3.579545 MHz (color burst), 45-55 % duty.
34	/A/S	ctrl	Alphanumeric (LOW) or semigraphics (HIGH) select. Can change character by character.
35	/A/G	ctrl	Alphanumeric (LOW) or full graphics (HIGH) select.
36	/RP	ctrl	Row preset output. Clears an external character-row counter; pulses only in alpha and semigraphics modes.
37	/FS	video	Field sync output. Falls at the end of the active display; the CPU may use the RAM freely until it rises.
38	/HS	video	Horizontal sync output, coincident with the TV horizontal sync pulse.
39	CSS	ctrl	Color set select input. Picks one of two color sets in alpha, semigraphics 6 and full graphics modes.
40	DD7	data	Data bus bit 7 from screen RAM.

MC6847 video display generator pinout

Pins

Fitted in

Sources