74LS169 synchronous 4-bit up/down counter pinout

DIP-16. Presettable synchronous binary counter, up or down; often a programmable clock divider

On the Electron (IC9) it divides the 16 MHz clock by 13 for the cassette and baud timing: CLK (pin 2) takes 16 MHz from the 74S04 pin 8, A and B (pins 3, 4) are tied high and C and D (5, 6) low, and QD (pin 11) gives an 812 ns (1.23 MHz) clock to ULA pin 55 and expansion pin 13. No output = tape dead. The board also takes a 74LS163 with the extra parts R59, R60, R62, Q9 marked * on the drawing.

Open the interactive 74LS169 pinout

Pins

PinNameTypeSignal
1U/DctrlCount direction: high = up, low = down.
2CLKclockClock; counts on the rising edge.
3ActrlPreset data A (least significant).
4BctrlPreset data B.
5CctrlPreset data C.
6DctrlPreset data D (most significant).
7/ENPctrlCount enable P (both enables low to count).
8GNDgroundGround.
9/LOADctrlSynchronous load of A-D on the next clock.
10/ENTctrlCount enable T; also enables RCO.
11QDioCounter output D (most significant).
12QCioCounter output C.
13QBioCounter output B.
14QAioCounter output A (least significant).
15/RCOctrlRipple carry out: low at terminal count (15 up, 0 down).
16VCCpower+5 V.

Fitted in

Sources