PCjr video gate array pinout

DIP-40. PCjr video: modes, palette and the video memory interface.

The PCjr video gate array takes the CPU video writes and makes the CRT timing and color. It does the job of the CGA card, built into the planar: with the 6845 (ZM21) it shares the system RAM between the CPU and the display, and it drives the RGBI, composite color and TV sync outputs. IBM part 1503730, 40 pins, at ZM36. Pin names are as drawn in the Technical Reference; IBM publishes no data sheet for it.

Open the interactive GA pinout

Pins

PinNameTypeSignal
1VCCpower+5 V.
2CLKclock14 MHz clock.
3/MEM CSctrlVideo RAM select (-VIDEO RAM CS from the 24S10 decoder ZM56).
4MEM CYCctrlMemory cycle, from a 74LS00 gate (ZM58) on -XMEMW and -XMEMR.
5/IO CSctrlGate array I/O select (-GA I/O CS).
6/IOWctrlI/O write (-ZIOW).
7/IORctrlI/O read (-ZIOR).
8CURSORvideoCursor, from the 6845.
9D2dataData bit 2 (ZD2).
10D1dataData bit 1 (ZD1).
11D0dataData bit 0 (ZD0).
12D3dataData bit 3 (ZD3).
13D4dataData bit 4 (ZD4).
14CCGvideoCCG control output (to the board logic; name as drawn).
15ACGvideoACG control output (to the board logic; name as drawn).
16GATEctrlGATE strobe to the video latches.
17GNDgroundGround.
18RASctrlRAM row strobe timing.
19IvideoIntensity output.
20RvideoRed output.
21GvideoGreen output.
22BvideoBlue output.
23CCLKvideoCharacter clock to the 6845.
24GNDgroundGround.
25CRT/CPUctrlSelects whether the CRT or the CPU owns the video RAM address lines. UNVERIFIED
26COMP COLORvideoComposite color output.
27TV HORvideoHorizontal drive.
28TV VERTvideoVertical drive.
29VRDYctrlVideo ready: holds the CPU while the video RAM is busy. UNVERIFIED
30DEvideoDisplay enable, from the 6845.
31VERT INvideoVSYNC from the 6845.
32HOR INvideoHSYNC from the 6845.
33MD7dataVideo memory data bit 7, read in. On the board the 4164 DOUT pins (sheet 4) and the character latch ZM70 (sheet 5) drive this bus; writes go to the RAM DIN pins by another path. UNVERIFIED
34MD6dataVideo memory data bit 6, read in. On the board the 4164 DOUT pins (sheet 4) and the character latch ZM70 (sheet 5) drive this bus; writes go to the RAM DIN pins by another path. UNVERIFIED
35MD5dataVideo memory data bit 5, read in. On the board the 4164 DOUT pins (sheet 4) and the character latch ZM70 (sheet 5) drive this bus; writes go to the RAM DIN pins by another path. UNVERIFIED
36MD4dataVideo memory data bit 4, read in. On the board the 4164 DOUT pins (sheet 4) and the character latch ZM70 (sheet 5) drive this bus; writes go to the RAM DIN pins by another path. UNVERIFIED
37MD3dataVideo memory data bit 3, read in. On the board the 4164 DOUT pins (sheet 4) and the character latch ZM70 (sheet 5) drive this bus; writes go to the RAM DIN pins by another path. UNVERIFIED
38MD2dataVideo memory data bit 2, read in. On the board the 4164 DOUT pins (sheet 4) and the character latch ZM70 (sheet 5) drive this bus; writes go to the RAM DIN pins by another path. UNVERIFIED
39MD1dataVideo memory data bit 1, read in. On the board the 4164 DOUT pins (sheet 4) and the character latch ZM70 (sheet 5) drive this bus; writes go to the RAM DIN pins by another path. UNVERIFIED
40MD0dataVideo memory data bit 0, read in. On the board the 4164 DOUT pins (sheet 4) and the character latch ZM70 (sheet 5) drive this bus; writes go to the RAM DIN pins by another path. UNVERIFIED

Fitted in

Sources