Amstrad 40030 PAL (PAL16L8) pinout

DIP-20. 128K RAM banking: second-bank /CAS and the A14/A15 remap for the 6128 RAM configurations

Holds the 6128 RAM configuration register: an OUT to &7Fxx with D7 and D6 both HIGH latches D0-D2. It then steers /CAS to bank 0 (IC127-134) or bank 1 (IC119-126) and rewrites A14/A15 for the multiplexers, so a block of the second 64K appears at &4000 or elsewhere. Without it (64K builds) links LK5, LK6 and LK8 are closed. A bad PAL gives a 6128 that works in BASIC but fails CP/M Plus or |BANK commands.

Open the interactive 40030 pinout

Pins

PinNameTypeSignal
1D7·D6ctrlD7 AND D6 from a 74LS08 gate: HIGH marks a RAM-configuration write.
2D0dataRAM configuration bit 0.
3/RESETctrlReset clears the configuration to 0 (normal 64K map).
4RAMDISctrlExpansion RAMDIS: HIGH turns both banks off.
5D1dataRAM configuration bit 1.
6D2dataRAM configuration bit 2.
7/CASctrl/CAS from Gate Array pin 16 (NCAS).
8A15addrCPU address bit 15.
9A14addrCPU address bit 14.
10GNDground0 V.
11/CPUctrlGate Array /CPU phase: remap only during CPU accesses, never for video.
12A15OUTaddrRemapped A15 to the 74LS153 multiplexer (IC109).
13NCncUnused output (signals present, not connected).
14NCncUnused output.
15NCncUnused output.
16/CAS1ctrlCAS for bank 1, the second 64K (IC119-126), through R160, 47 ohms.
17/CAS0ctrlCAS for bank 0, the first 64K (IC127-134), through R161, 47 ohms.
18/IOWRctrlI/O write strobe (from the 74LS32): latches the configuration.
19A14OUTaddrRemapped A14 to the 74LS153 multiplexer.
20VCCpower+5 V.

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Sources