251829 (64H157) 20-pin gate array pinout
DIP-20. Address decoder (ROM, RAM, I/O selects), saddle canceller and motor-speed PLL (1541B/C, 1571)
Decodes A10 and A12-A15 into active-LOW selects: RAME $0000-$0FFF, IO1 $1800-$1BFF, IO2 $1000-$1FFF, CS1 $2000-$3FFF, CS2 $4000-$7FFF, ROME $C000-$FFFF (1571 service manual p. 4). It also cancels the read "saddle" on tracks 31-35 digitally and runs the PLL that follows motor speed; the 1571 does not use LOCK. With no ROM or RAM select the drive cannot finish its power-up.
Open the interactive 251829 pinoutPins
| Pin | Name | Type | Signal |
|---|---|---|---|
| 1 | OSC | clock | 16 MHz oscillator in. |
| 2 | SYNC | ctrl | Sync from the 251828; LOW switches the PLL to the internal clock. |
| 3 | DATA | io | Read data from the R/W hybrid data comparator (hybrid pin 19). |
| 4 | TEST | ctrl | Test input (tied to +5 V on the 1571). |
| 5 | GND | ground | Ground. |
| 6 | A15 | addr | Address bit 15. |
| 7 | A14 | addr | Address bit 14. |
| 8 | A13 | addr | Address bit 13. |
| 9 | A12 | addr | Address bit 12. |
| 10 | A10 | addr | Address bit 10. |
| 11 | CLR | ctrl | Saddle-cancel clear to the 251828 CLR: HIGH for about 63 ns when the read data changes. |
| 12 | PLL | clock | Motor-speed compensated sampling clock to the 251828. |
| 13 | LOCK | ctrl | PLL locked (HIGH). Not used by the 1571. |
| 14 | /ROME | ctrl | ROM select, $C000-$FFFF. |
| 15 | VCC | power | +5 V supply. |
| 16 | /CS2 | ctrl | Select $4000-$7FFF (6526 CIA on the 1571). |
| 17 | /CS1 | ctrl | Select $2000-$3FFF (WD1770 on the 1571). |
| 18 | /IO2 | ctrl | I/O select $1000-$1FFF. |
| 19 | /IO1 | ctrl | I/O select $1800-$1BFF. |
| 20 | /RAME | ctrl | RAM select, $0000-$0FFF. |
Fitted in
- Commodore 1541 disk drive UC5 (1541B/1541C 250448 only; not on the 1541-II)
- Commodore 1571 disk drive U5
