MC6809E microprocessor pinout

DIP-40. Main CPU, 8-bit with 16-bit registers. Same CPU in every CoCo and in the Dragon 32 and 64.

The 6809E runs the CoCo from the E and Q clocks that the SAM (CoCo 1 and 2) or the GIME (CoCo 3) makes. No clock, no boot. It takes its reset from the power-on circuit. The CoCo 3 runs the same chip at 1.79 MHz in double-speed mode. CoCo 3 (IC1): BS, BA, BUSY, AVMA and LIC (pins 5, 6, 33, 36, 38) are not connected and TSC (pin 39) is tied to ground.

Open the interactive 6809E pinout

Pins

Pin	Name	Type	Signal
1	Vss	ground	Ground.
2	/NMI	ctrl	Non-maskable interrupt. Active LOW.
3	/IRQ	ctrl	Interrupt request. Active LOW.
4	/FIRQ	ctrl	Fast interrupt request. Active LOW.
5	BS	ctrl	Bus status. Read with BA: BA LOW and BS HIGH is an interrupt or reset acknowledge; BA HIGH and BS LOW is a SYNC acknowledge; both HIGH is a halt acknowledge.
6	BA	ctrl	Bus available. HIGH means the CPU has stopped and its address and data buses are high impedance.
7	Vcc	power	+5 V supply.
8	A0	addr	Address bit 0.
9	A1	addr	Address bit 1.
10	A2	addr	Address bit 2.
11	A3	addr	Address bit 3.
12	A4	addr	Address bit 4.
13	A5	addr	Address bit 5.
14	A6	addr	Address bit 6.
15	A7	addr	Address bit 7.
16	A8	addr	Address bit 8.
17	A9	addr	Address bit 9.
18	A10	addr	Address bit 10.
19	A11	addr	Address bit 11.
20	A12	addr	Address bit 12.
21	A13	addr	Address bit 13.
22	A14	addr	Address bit 14.
23	A15	addr	Address bit 15. Top bit of the 64K map.
24	D7	data	Data bit 7.
25	D6	data	Data bit 6.
26	D5	data	Data bit 5.
27	D4	data	Data bit 4.
28	D3	data	Data bit 3.
29	D2	data	Data bit 2.
30	D1	data	Data bit 1.
31	D0	data	Data bit 0.
32	R/W	ctrl	Read / write. HIGH = read, LOW = write.
33	BUSY	ctrl	Busy. HIGH during the read and modify cycles of a read-modify-write instruction and the first byte of a double-byte access.
34	E	clock	E (enable) clock input from the system clock generator (SAM or GIME).
35	Q	clock	Q clock input. Same rate as E, a quarter cycle ahead.
36	AVMA	ctrl	Advanced valid memory address. Tells the bus a valid address is out next cycle.
37	/RESET	ctrl	Reset. LOW holds the CPU in reset. Released after power-up.
38	LIC	ctrl	Last instruction cycle. HIGH on the last cycle of an opcode.
39	TSC	ctrl	Three-state control. HIGH floats the address and data bus.
40	/HALT	ctrl	Halt. LOW stops the CPU at the end of the current instruction; it stays halted, with BA and BS HIGH, until the pin goes HIGH again.

MC6809E microprocessor pinout

Pins

Fitted in

Sources