MC6808 microprocessor pinout
DIP-40. Main CPU. Runs the monitor, ROM and speech and motion code. No on-chip RAM.
The 6800-family CPU with no internal RAM. Its own oscillator divides the crystal by four to make the E clock. HERO Jr ties /HALT and MR high and pulls /IRQ up with R202; the HERO 1 ABORT switch drives /NMI (P403 pin 23). HERO 1 ties RE (pin 36) to ground with pins 1 and 21 (ET-18 schematic sheet 2, U401). HERO Jr: 4 MHz crystal Y201, E = 1 MHz; HERO 1: 3.58 MHz (ROM 1.0) or 4 MHz. A dead CPU shows as a dead display and no speech; check the crystal, RESET and Vcc first.
Open the interactive 6808 pinoutPins
| Pin | Name | Type | Signal |
|---|---|---|---|
| 1 | VSS | ground | Ground. |
| 2 | /HALT | ctrl | Halt: pulled low stops the CPU after the current instruction. |
| 3 | MR | ctrl | Memory ready, active high. High for normal cycles; pulled low it stretches E for slow memory. |
| 4 | /IRQ | ctrl | Interrupt request. Peripherals pull it low; needs a pull-up. |
| 5 | VMA | ctrl | Valid memory address: high when the address bus holds a valid address. |
| 6 | /NMI | ctrl | Non-maskable interrupt. Software cannot disable it. |
| 7 | BA | ctrl | Bus available: HIGH when the CPU has stopped (halt or WAI). The data outputs are off, but the address outputs stay driven (not three-state), so another bus master must not drive the address bus. |
| 8 | VCC | power | +5 V supply. |
| 9 | A0 | addr | Address bus bit 0. |
| 10 | A1 | addr | Address bus bit 1. |
| 11 | A2 | addr | Address bus bit 2. |
| 12 | A3 | addr | Address bus bit 3. |
| 13 | A4 | addr | Address bus bit 4. |
| 14 | A5 | addr | Address bus bit 5. |
| 15 | A6 | addr | Address bus bit 6. |
| 16 | A7 | addr | Address bus bit 7. |
| 17 | A8 | addr | Address bus bit 8. |
| 18 | A9 | addr | Address bus bit 9. |
| 19 | A10 | addr | Address bus bit 10. |
| 20 | A11 | addr | Address bus bit 11. |
| 21 | VSS | ground | Ground (second pin). |
| 22 | A12 | addr | Address bus bit 12. |
| 23 | A13 | addr | Address bus bit 13. |
| 24 | A14 | addr | Address bus bit 14. |
| 25 | A15 | addr | Address bus bit 15. |
| 26 | D7 | data | Data bus bit 7 (MSB). |
| 27 | D6 | data | Data bus bit 6. |
| 28 | D5 | data | Data bus bit 5. |
| 29 | D4 | data | Data bus bit 4. |
| 30 | D3 | data | Data bus bit 3. |
| 31 | D2 | data | Data bus bit 2. |
| 32 | D1 | data | Data bus bit 1. |
| 33 | D0 | data | Data bus bit 0. |
| 34 | R/W | ctrl | Read/write: high = read, low = write. |
| 35 | VCC STBY | nc | Standby supply for the internal RAM of the MC6802; the datasheet says tie it to 5 V on the MC6802NS. It gives no use on the MC6808. UNVERIFIED |
| 36 | RE | ctrl | Must be tied to ground on the MC6808 (datasheet note). |
| 37 | E | clock | E clock output: the crystal frequency divided by four. |
| 38 | XTAL | clock | Crystal pin 1. Crystal runs between XTAL and EXTAL. |
| 39 | EXTAL | clock | Crystal pin 2 (or external clock input). |
| 40 | /RESET | ctrl | Reset: held low at power-up, then released so the CPU fetches the vector at $FFFE-$FFFF. |