SALLY 6502C (Atari XL/XE CPU, C014806) pinout

DIP-40. CPU for the 600XL, 800XL and 130XE. HALT on pin 35, R/W moved to pin 36.

The XL/XE CPU is the 6502C, nicknamed SALLY (Atari part C014806). It has the 6502 core, but pin 35 is a HALT input so ANTIC can stop it without the 400/800 glue logic, R/W moves from pin 34 to pin 36, and pins 7 (SYNC) and 34 are not connected. A stock 6502 will not run in its socket.

Open the interactive 6502C pinout

Pins

Pin	Name	Type	Signal
1	Vss	ground	0 V.
2	RDY	ctrl	Ready input from ANTIC pin 15. LOW holds the CPU. 3 kΩ pull-up on the 130XE.
3	PHI1	clock	Phase 1 clock out.
4	/IRQ	ctrl	Interrupt request from POKEY and the PIA.
5	NC	nc	Not connected.
6	/NMI	ctrl	Non-maskable interrupt from ANTIC pin 7 (display interrupts). The XL/XE RESET key does not use it: it drives /RES (pin 40) through the reset circuit. 3 kΩ pull-up on the 130XE.
7	NC	nc	Not connected on the board. This is SYNC on a stock 6502; the Atari manuals mark it N.C.
8	Vcc	power	+5 V supply.
9	A0	addr	Address bus bit 0.
10	A1	addr	Address bus bit 1.
11	A2	addr	Address bus bit 2.
12	A3	addr	Address bus bit 3.
13	A4	addr	Address bus bit 4.
14	A5	addr	Address bus bit 5.
15	A6	addr	Address bus bit 6.
16	A7	addr	Address bus bit 7.
17	A8	addr	Address bus bit 8.
18	A9	addr	Address bus bit 9.
19	A10	addr	Address bus bit 10.
20	A11	addr	Address bus bit 11.
21	Vss	ground	0 V.
22	A12	addr	Address bus bit 12.
23	A13	addr	Address bus bit 13.
24	A14	addr	Address bus bit 14.
25	A15	addr	Address bus bit 15.
26	D7	data	Data bus bit 7.
27	D6	data	Data bus bit 6.
28	D5	data	Data bus bit 5.
29	D4	data	Data bus bit 4.
30	D3	data	Data bus bit 3.
31	D2	data	Data bus bit 2.
32	D1	data	Data bus bit 1.
33	D0	data	Data bus bit 0.
34	NC	nc	Not connected. R/W moved to pin 36 on the 6502C; a stock 6502 has R/W here.
35	/HALT	ctrl	HALT input from ANTIC pin 9. LOW stops the CPU so ANTIC can fetch screen data.
36	R/W	ctrl	Read (HIGH) or write (LOW). On the 6502C this is pin 36, not 34.
37	PHI0	clock	Phase 0 clock in, from ANTIC pin 34.
38	SO	ctrl	Set Overflow. Tied to ground on the 130XE.
39	PHI2	clock	Phase 2 clock out: the machine clock, 1.79 MHz on NTSC. Feeds ANTIC, GTIA, POKEY and the PIA.
40	/RES	ctrl	Reset. LOW resets the CPU at power-up.

Fitted in

Sources

Atari 800XL Field Service Manual Rev. 01 (Feb 1984), Fig. 1-3, 6502C CPU pin assignments, p. 1-5
Atari 600XL Field Service Manual Rev. 1, Fig. 1-3, 6502C CPU pin assignments, p. 1-5
Sams Computerfacts CC16, Atari 130XE (1986), schematic, CPU U8 with logic-probe readings
MOS 6500 Microprocessors data sheet (Nov 1985), p. 10: stock 6502 pinout (SYNC on pin 7, R/W on pin 34)