8284A clock generator and driver pinout
DIP-18. Crystal oscillator, divide-by-3 CPU clock, ready synchronizer and reset for the 8088.
Runs the crystal and divides it by three for CLK, then by two again for PCLK. It turns the slow /RES input into a clean RESET and synchronizes the ready lines into READY. On the 5150 the crystal is 14.31818 MHz, so CLK is 4.77 MHz, PCLK 2.386 MHz and OSC 14.318 MHz, and /RES is the PSU Power Good line. A dead 8284A gives no clock or a CPU held in reset. 5150 board (logic diagram sheet 1, U11): CSYNC, RDY2, F/C and /ASYNC tied to GND; /AEN2 tied to +5 V; /AEN1 driven by /RDY/WAIT and RDY1 by /DMA WAIT; /RES is P8 pin 1 Power Good; EFI not connected.
Open the interactive 8284A pinoutPins
| Pin | Name | Type | Signal |
|---|---|---|---|
| 1 | CSYNC | ctrl | Clock synchronization, active HIGH. HIGH resets the dividers so several 8284As stay in phase. Tied LOW when the crystal oscillator is used. |
| 2 | PCLK | clock | Peripheral clock: CLK divided by 2, 50 percent duty, TTL level. |
| 3 | /AEN1 | ctrl | Address enable 1, active LOW. Qualifies RDY1. |
| 4 | RDY1 | ctrl | Bus ready 1, active HIGH, qualified by /AEN1. |
| 5 | READY | ctrl | Synchronized ready to the CPU READY pin, active HIGH. |
| 6 | RDY2 | ctrl | Bus ready 2, active HIGH, qualified by /AEN2. |
| 7 | /AEN2 | ctrl | Address enable 2, active LOW. Qualifies RDY2. |
| 8 | CLK | clock | Processor clock: one third of the crystal or EFI frequency, 33 percent duty. Drives the CPU and the 8288. |
| 9 | GND | ground | Ground. |
| 10 | RESET | ctrl | Reset to the CPU, active HIGH, synchronized to CLK from /RES. |
| 11 | /RES | ctrl | Reset input, active LOW, Schmitt trigger. Usually an RC network or a power-good signal. |
| 12 | OSC | clock | Oscillator output at the crystal frequency, TTL level. |
| 13 | F/C | ctrl | Frequency/crystal select. LOW: CLK comes from the crystal. HIGH: from EFI. |
| 14 | EFI | clock | External frequency input, used when F/C is HIGH. |
| 15 | /ASYNC | ctrl | Ready synchronization select. LOW: two-stage READY synchronization. HIGH or open: one stage. |
| 16 | X2 | clock | Crystal connection. |
| 17 | X1 | clock | Crystal connection. |
| 18 | VCC | power | +5 V supply. |
Fitted in
- IBM PC 5150 U11
- IBM XT 5160
- IBM Portable 5155 U1 (XT Technical Reference 1502237, sheet 1 of 10; same 64-256KB board)
- IBM PCjr 4860 ZM8